Design, Verification and Circuit Level Implementation of a Ballistic MOSFET
By: Chatterjee, Arun Kumar
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Contributor(s): Prasad, B.
Publisher: New Delhi STM Journals 2018Edition: Vol. 8(3), Sep- Dec.Description: 15-22p.Subject(s): EXTC EngineeringOnline resources: Click Here
In:
Journal of VLSI design tools & technology (JoVDTT)Summary: drain current expression is obtained for a nanoscale ballistic MOSFET within the framework of Landauer-Buttiker formalism considering intrinsic silicon channel at low temperature. The model drain current is compared with the numerical simulations of near ballistic nanoMOSFET structure. There is a reasonable agreement between the model and the numerical simulation results. This demonstrates the remarkably low value of the subthreshold slope of ballistic nanoMOSFET. Further, the design structure is incorporated in an inverter circuit which works well verifying its functionality in the integrated circuits.
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Articles Abstract Database
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School of Engineering & Technology Archieval Section | Not for loan | 2021-2021725 |
drain current expression is obtained for a nanoscale ballistic MOSFET within the framework of Landauer-Buttiker formalism considering intrinsic silicon channel at low temperature. The model drain current is compared with the numerical simulations of near ballistic nanoMOSFET structure. There is a reasonable agreement between the model and the numerical simulation results. This demonstrates the remarkably low value of the subthreshold slope of ballistic nanoMOSFET. Further, the design structure is incorporated in an inverter circuit which works well verifying its functionality in the integrated circuits.
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